Embodiments of the present invention relate to a semiconductor memory device and a method of operating the same.
In a semiconductor memory device, the magnitude of a threshold voltage may be varied by adjusting an amount of charge that is supplied to a floating gate of a memory cell. Therefore, data in a variety of formats may be stored. In addition, the stored data may be read by sensing the threshold voltage of the memory cell.
As methods of sensing the threshold voltage of the memory cell, a voltage sensing method and a current sensing method are used.
In the current sensing method, when sensing the threshold voltage of the memory cell, a reference current that is input to the bit line senses the threshold voltage by verifying whether a bit line is precharged or not.
Therefore, whether a current flowing through the bit line and a cell string is leaked to a common source line (CSL) or not is important.
Meanwhile, in the common source line (CSL), source line bouncing may occur due to a structure in which a plurality of cell strings are coupled in common.
The source line bouncing refers to a phenomenon in which a large amount of current flows into the common source line (CSL) along the cell string coupled with the bit line while performing a reading operation, and thereby a voltage of the common source line (CSL) rises. When the voltage of the common source line (CSL) rises, the current flowing to the cell string may not be discharged sufficiently.
That is, the current may not be leaked into the common source line (CSL) through the cell string due to the source line bouncing, and thereby the threshold voltage of the memory cell may not be sensed normally.